Ran Ginosar
|
Professor, The Andrew & Erna Viterbi Faculty of
Electrical Engineering BSc (scl), Technion, 1978; PhD, EECS, Princeton University, 1982 |
Many-core Plural architecture
Rad-Safe VLSI for Space Applications
Neurochips
Asynchronous Logic Design
Synchronization and Multi-Clock Domains (MCD) Systems on Chip (SOC)
The Synchronization and MCD Tutorial [IEEE Design & Test, Sept/Oct 2011]
Roman Kaplan (PhD): Processing in Storage Computing Architecture
Industrial Involvement and Entrepreneurship
Last Update: 17/12/2017