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Publications:
- E. Bolotin, I.
Cidon, R. Ginosar and A. Kolodny, ”QNoC:
QoS architecture and design process for Network on Chip", Special
issue on Networks on Chip, The Journal of Systems Architecture,
December 2003
- E.
Bolotin, I. Cidon, R. Ginosar and A. Kolodny, ”Cost
considerations in Network on Chip", Special issue on Networks
on Chip, Integration - The VLSI Journal, 2003
- A. Morgenshtein, E.
Bolotin, I. Cidon, R. Ginosar and A.
Kolodny, "Micro-Modem
– Reliability Solution For NoC Communications", ICECS-2004.
- E. Bolotin, A.
Morgenshtein, I. Cidon, R. Ginosar and
A. Kolodny, ”Automatic
Hardware-Efficient SoC Integration by QoS Network on Chip",
ICECS-2004.
- A. Morgenshtein, I. Cidon, A. Kolodny and R. Ginosar, ”Comparative Analysis
of Serial vs. Parallel Links in Networks on Chip", SoC 2004.
- R. Dobkin, V.
Vishnyakov, E. Friedman and R.Ginosar, "An
Asynchronous Router for Multiple Service Levels Networks on Chip,"
ASYNC 2005.
- R. Dobkin, I.Cidon,
R.Ginosar, A.Kolodny and A.Morgenshtein, "Fast
Asynchronous Bit-Serial Interconnects for Network-on-Chip,"
2004.
- A. Morgenshtein,
I.Cidon, A. Kolodny and R. Ginosar, "Low-Leakage
Repeaters for NoC Interconnects," Special Session "Repeater
Insertion for Nanometer Technologies - Timing is NOT Everything", ISCAS, pp.
600-603, May 2005
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Z. Guz, I. Walter, E. Bolotin, I. Cidon,
R. Ginosar and A. Kolodny, “Efficient
Link Capacity and QoS Design for Wormhole Network-on-Chip,” DATE 2006.
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R. Dobkin, R. Ginosar and A. Kolodny, "
Fast Asynchronous Shift Register for Bit-Serial Communication,"
accepted to ASYNC 2006.
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E.
Bolotin, I. Cidon, R. Ginosar, A. Kolodny, "Routing
Table Minimization for Irregular Mesh NoCs", accepted for presentation
in DATE 2007.
- I. Walter,
I. Cidon, R. Ginosar and A. Kolodny, “Curing Hotspots in
Wormhole NoCs,” submitted to DAC 2006.
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