Software Tools

All software tools and benchmarks developed by the group are offered for public use. For more information please follow the links below.

HNoCS: Modular Open-Source Simulator for Heterogeneous NoCs

Please visit HNOCS website for more details and downloads.

The corresponding paper describing HNOCS is: "HNOCS: Modular Open-Source Simulator for Heterogeneous NoCs" [bibtex]

SMV: Selective Multi-Versioning STM

Selective Multi-Versioning STM (SMV) is a novel STM algorithm that reduces the number of aborts, especially those of long read-only transactions. SMV keeps old object versions as long as they might be useful for some transaction to read. It is able to do so while still allowing reading transactions to be invisible by relying on automatic garbage collection to dispose of obsolete versions. In order to evaluate SMV's performance we have designed and implemented a framework for a smooth plug-in of STM algorithms into a Java code. In the package below you can find this framework plugged-in to the STMBench7 benchmark suite, together with SMV, TL2 and LSA algorithms' implementations.
the SMV package: zip file

Simics Workload Kits

Virtutech Simics is a full-system simulator platform, becoming quite popular within the computer architecture research community. Unfortunately, building and setting up benchmarks for the simulator is a time-consuming task that requires a long ramp up time. To ease up this burden, we will try to supply scripts that (to some extent) automate the build of several application. For more inforamtion please follow to the Simics Workload Kits page.

OPNET Models for NoC

In order to examine the effects of various design and implementation options on the performance of the NoC, "OPNET Modeler" is used. This commercial, GUI-based environment facilitates the development of a modular, hierarchical description of the NoC architecture and allows rapid evaluation of its components using an event-driven simulation engine. We have implemented router, source and sink modules which enable the modeling of an entire NoC, accounting for its flow-control, virtual channels, resource contention, arbitration policy, finite buffers, link capacities, etc. These models are offered for public use - for details, please contact zigi@tx.technion.ac.il. Note that a license is required in order to use OPNET Modeler, as specified at www.opnet.com.

Transactified Apache Kit

Apache is a large-scale industrial multi-process and multi-threaded application, which uses lock-based synchronization. We have experimented with modifying Apache to employ transactional memory instead of locks, a process we refer to as transactification; we are not aware of any previous efforts to transactify legacy software of such a large scale. We have transactified apache's memory cache module mod_mem_cache using Intel's experimental STM C/C++ compiler. For the transactified Apache code along with detailed instuctions on how to install, test it, and use it as a benchmark please follow to the Transacitfied Apache Kit page